Silicon carbide single crystals have excellent physical properties such as large dielectric breakdown field strength and high thermal conductivity. For this reason, a semiconductor device using silicon carbide instead of silicon that hitherto has been widely used as a semiconductor material, that is, a silicon carbide semiconductor device, is expected as a high-performance semiconductor device, in particular, as a power device. The silicon carbide exists in crystal polymorphs of different crystal structures (so-called 2H, 3C, 4H, 6H, 8H, or 15R type and such), although having the same chemical formula. Among above, 4H-type silicon carbide is suitable for the use of such a power device that copes with a high voltage. “H” herein represents a crystal polymorph of a hexagonal system (hexagonal), and “4” represents a structural unit in which a double-atomic layer formed of Si (silicon) and C (carbon) are stacked four times. The 4H-type silicon carbide particularly has advantages as a material of a substrate for a power device. Specifically, the bandgap thereof is as wide as 3.26 eV, and further, anisotropy of electron mobility is low in a direction parallel to the c-axis and a direction perpendicular thereto.
In general, a silicon carbide single-crystal substrate is manufactured with a method in which a raw material containing Si and C is sublimated inside a crucible to grow crystals on a seed crystal (sublimation recrystallization method). In order to obtain as many silicon carbide semiconductor devices as possible from one substrate with high yield, it is required that the entire silicon carbide single-crystal substrate have uniform crystals of a single crystal polymorph. In order to enhance productivity while satisfying such a requirement, efforts have been made to increase the size of the substrate. Hitherto, the diameter of a commercially available substrate had been up to 100 mm (4 inches); however, the size has increased to be as large as 150 mm (6 inches) at the present.
In the manufacture of the silicon carbide semiconductor device, there is used a silicon carbide epitaxial substrate including the silicon carbide single-crystal substrate and a silicon carbide layer provided thereon through epitaxial growth. Typically, the epitaxial growth is conducted with a chemical vapor deposition (CVD) method that uses a source gas containing Si atoms and C atoms. At least a part of an epitaxial layer is used as an active layer in which a semiconductor element structure is to be formed. Adjustment of impurity concentration and a thickness of the active layer enables adjustment of a withstand voltage and element resistance of a semiconductor device. Specifically, a semiconductor device having a higher withstand voltage can be obtained as the impurity concentration inside the active layer is lower, further, as the thickness of the active layer is larger.
Commercially available silicon carbide single-crystal substrates have crystal defects at high density as compared to silicon single-crystal substrates or the like. Propagation of the crystal defects from the single-crystal substrate to the epitaxial growth layer (i.e., to the active layer) at the time of epitaxial growth may adversely affect operations of the silicon carbide semiconductor device. As typical crystal defects of silicon carbide, there are given a threading screw dislocation, a threading edge dislocation, a basal plane dislocation, a stacking fault, and the like. The basal plane dislocation is decomposed into two partial dislocations, accompanying a stacking fault therebetween. When a bipolar device such as a PIN diode is energized in a forward direction, the stacking fault traps injected carriers and expands an area thereof. It is known that increase in forward voltage drop of the device is caused due to the above (refer to Non-Patent Document 1: JOURNAL OF APPLIED PHYSICS 99, 011101 (2006), for example). This phenomenon is hereinafter referred to as “energized deterioration.” Further, the expression of the “basal plane dislocation” as used in this specification connotes the above-mentioned “two partial dislocations.”
It is known that many of the basal plane dislocations inside a silicon carbide substrate having a surface being a plane inclined by several degrees with respect to a (0001) plane are, at the time of epitaxial growth with the CVD method, converted into threading edge dislocations, which affect the device to a lesser extent. In order to suppress the above-mentioned energized deterioration, various attempts have been made to enhance a rate of converting the basal plane dislocation inside the substrate into the threading edge dislocation at the time of epitaxial growth (conversion rate).
According to Japanese Patent Application Laid-Open No. 2007-250693 (Patent Document 1), for example, a second epitaxial growth layer having impurity concentration of 3×1019 cm−3 or more is formed in the middle of a first epitaxial growth layer. In the second epitaxial growth layer, crystal strain abruptly becomes larger. According to the above-mentioned publication, there is a description as for the capability of conversion into a dislocation that is less liable to adversely affect electrical properties by changing orientation of the dislocation. In this method, however, the formation of the second epitaxial growth layer having high impurity concentration itself may be a factor of generating the stacking fault (refer to Non-Patent Document 2: PHYSICA B 376-377, 338 (2006), for example). Further, the abrupt change in a profile of impurity concentration between the first epitaxial growth layer and the second epitaxial growth layer may newly generate a basal plane dislocation adversely. Therefore, effectiveness of this method was low in actuality.
Further, according to Japanese Patent Application Laid-Open No. 2008-74661 (Patent Document 2), for example, there is disclosed a silicon carbide epitaxial substrate including, on the silicon carbide single-crystal substrate, a suppressing layer for suppressing density of basal plane dislocations and an active layer formed on the suppressing layer. The suppressing layer has a structure in which nitrogen concentration is reduced toward the active layer side in a stepwise manner.